As semiconductor technology has advanced, the amount and speed of logic available on an integrated circuit (IC) has increased more rapidly than the number and performance of input/output (I/O) connections. As a result, IC die stacking techniques have received renewed interest to address the interconnection bottleneck of high-performance systems. In stacked IC applications, two or more ICs are stacked vertically, and interconnections between them are made by wire bonding at chip periphery or by forming high aspect ratio through die vias (TDVs). There are several approaches for stacking ICs. Multiple silicon device layers can be grown epitaxially or fully processed ICs can be bonded for vertical integration.